|1||JOB001||Trainee/Associate Engineer||0-1 Year||Bangalore||01 Jun 2016||20 Dec 2016|
B.Tech Electronics/Electrical/Computer Science Engineering with minimum of 6 months training in VLSI courses with high scores. Or M.Tech in Electronics/VLSI/CAD with high scores.
- Strong analytical/Aptitude skills.
- Very good programming & scripting skills.
- Excellent skills in Unix, Shell, Editors (GVIM).
- Good communication & very good attitude.
|2||JOB002||Physical Design Engineer||1-4 Years||Bangalore||01 Jun 2016||20 Dec 2016|
B.Tech or M.Tech in Electronics/Electrical Engineering with minimum of 1 year of strong, hands on Physical Design experience.Must have handled Netlist to GDS II at block level for multiple tape outs. With Block level hands on experiences in most of the following:.
- Block level floorplanning, power planning and IR drop analysis.
- Timing closure with Xtalk and OCV
- Multimode multi corner optimization and closure.
- Clock tree synthesis and advanced clock tree implementation.
- Blocks sizes upward of 400K Instances to 2M Instances.
- Block level timing closure with sign off STA.
- Scan chain reordering.
- Block level ECO implementation involving netlist level logical changes.
- Scripting experience in Perl/TCL.
- Excellent debugging skills in implementation issues and ability to come up with creative solutions.
- Low power technologies exposure.
- Technologies from 28nm and below.
- Physical Verification experience in advance nodes.
|3||JOB003||Sr/Lead/Engineering Manager - Physical Design Engineer ||5-12 Years||Bangalore||01 Jun 2016||20 Dec 2016|
B.Tech or M.Tech in Electronics/Electrical Engineering with minimum of 6 years of strong, hands on Physical Design experience. Must have handled Netlist to GDS II at Top level or Hierarchical top level for at least 1 tape out. Must have lead physical design team with hands on exposure in most of the following depending up on senior level or lead level role. Should have experience in 28nm & below technologies (preferably 20nm & below).
- AMD-Tile builder experience with power shutoff.
- Top level die size estimation, floorplanning, power estimation , power planning .
- IO Planning and package compatibility sign off.
- ESD analysis on IO ring and sign off.
- Netlist and constraint sign in checks and validation.
- Prime time constraint development at full chip level and clean up.
- Design implementation environment setup.
- Static and Dynamic power analysis at the top level.
- Netlist to GDS II implementation at chip level.
- Hierarchical chip planning, block planning , block level constraint development, hierarchical clock tree implementation, block integration and chip finishing.
- GDS merge and sign off for tape out.
- Ejob view.
- Multimode multi corner optimization and closure at top level.
- Clock tree synthesis and advanced clock tree implementation at full chip level.
- Handling of PLL, TXR, DDR and other analog components during implementation.
- IO ring customization for multi IO designs.
- Handling of FlipChip RDL/AreaIO package.
- Full chips upward of 1M Instances to 20M+ instances.
- Top level timing closure with sign off STA in MMMC with Xtalk and OCV.
- Top level ECO implementation strategy development for netlist ,RTL and timing level changes
- Methodology development, customization as per the specific design need.
- Good hands own knowledge in reference flows.
- Scripting experience in Perl/TCL.
- Flow customization and fine tuning for Power , Performance, Area.
- Exposure to DFM and DFM compatible implementation.
- Library performance analysis and fine tuning for implementation.
- Excellent debugging skills in implementation issues and ability to come up with creative solutions .
- Exposure to designs critical for power, area and timing at the same time.
- Technologies from 90nm and below.
- Good knowledge of RTL synthesis.
- Good exposure to Netlist formal verification.
- Human Resource estimation , license requirement estimation, machine resource estimation.
- Exposure to Physical design project planning and execution.
- Technical leadership and ability to mentor and make the team deliver.
|4||JOB004||AUTOSAR Engineer||5-10 Years||Bangalore||01 Jun 2016||20 Dec 2016|
Software Design, Implementation, Test of embedded Software components for Telematics control unit.Knowledge of system architecture vehicle networks (Flexray, mainly HS CAN) / diagnostic protocols / IPC AUTOSAR configuration tools Software optimization (runtime / memory) preferred: Vector Analysis/Configuration tools/tool chains Knowledge & implementation of HSM (Hardware Security Module).
- Internal/External Requirements management experience
- Create software design out of SW-Architecture / Component Specification
- Good knowledge of embedded Micro-controllers
- Experience in AUTOSAR SW driver development
- Experience in the Automotive Industry in ECU-SW-Projects
- Experience in AUTOSAR integration projects with SW Third Parties
- General SW experience ISO26262
- Embedded C development
- Implementation and Review of SW code
- Perform Developer tests, unit tests
- Version Management (E. G. SVN, JIRA, DMS)
- Automotive SPICE
- Development on Qualcomm platform based products
- Linux kernel development
- Linux driver development, bug fixing
- User space application development experience
- Inter-processor communications between various devices such as applications processors and Microcontrollers
- I2C, SPI, UART interface device drivers
- TCP/IP sockets and communications
- GIT version control system
- Use of debugging tools such as Trace, Lauterbach
|5||JOB005||DoIP Specialist||5-10 Year||Bangalore||01 Jun 2016||20 Dec 2016|
DoIP:- Diagnostics Over IP.
- Good knowledge of 16/32 bit Micro-controller architectures.
- Experience to vehicle in-network protocols like CAN/ LIN etc.
- Good Knowledge in the implementation and testing of Automotive Diagnostic Protocol and services
- ISO14229, KWP2000, SAE J1979, ISO15765, ISO13400 (DoIP), ISO10681 in embedded systems
- Understanding of operating system concepts like Scheduling, Interrupts, Memory and Process management
- Preferred to have working Experience in LINUX or QNX
- Strong skill in C language (MISRA C) for DSPs in Automotive domain Experience in Digital signal processors
- Knowledge and Experience in Quality Processes like CMMi.
|6||JOB006||HSM Specialist||5-10 Year||Bangalore||01 Jun 2016||20 Dec 2016|
Automotive developer for Automotive Security- Hardware Security Specialist.Hardware Security-Must have worked on security within a Linux platform for example sandboxing, CHROOT. Experience in working with hardware security modules or hardware features such as trust zones which are available on high end devices. We are looking for who can challenge security architects from companies such as Intel, Huawei, Qualcomm, Freescale, Renesas.Micro-controller Embedded Software development and validation for the SHE (Secure Hardware Extension) emulation based on the HSM (Hardware Security Module) of automotive microcontrollers based on TriCore.
- Development and validation of the SHE Complex drivers and Autosar CRY module on the Tricore side of the Microcontroller.
- Development and validation of the SHE emulation software modules on the HSM side with ARM Cortex M3 based on the HIS SHE standard specification with add-ons.
- Author architecture, design, test specifications and customer documents.
- Participate in software requirements analysis and ambiguity resolution.
- Provide technical solutions to customer change requests.
- Conceive and develop validation infrastructure for topics in own responsibility.
- Liaise with chip development engineers on a need basis.
- Embedded system software development/validation in C, assembly languages & SDLC.
- Experience with the Security related standards like AES Advanced Encryption Standard (defined by NIST) etc. is desirable.
- Experience in writing software for the Cryptographic algorithms is desirable.
- Good knowledge of the microcontrollers based on Tricore architecture is desirable.
- Good knowledge of the ARM Cortex M3 core is desirable.
- Good knowledge of computer architecture (16/32bit), real-time systems.
- Experience in standards such as AUTOSAR, Functional Safety - ISO26262, IEC61508 is desirable.
- Acquaintance with development tool-chains such as GNU, Tasking, Keil, RVCT etc.
- Good working knowledge of debuggers such as PLS, Lauterbach etc.
- Proven ability to work with standard lab equipment - oscilloscopes, logic analysers, power benches etc.
- Good team player in a multi-site work environment